1/6 preliminary data november 2000 this is preliminary data new product in development or undergoing evaluation. details are subject to change without notice. STB36NF02L n-channel 20v - 0.016 w - 36a d 2 pak low gate charge stripfet? power mosfet n typical r ds (on) = 0.016 w n typical qg = 19 nc @ 10v n optimal rds(on) x qg trade-off n conduction losses reduced n switching losses reduced description this application specific power mosfet is the third generation of stmicroelectronics unique single feature size? strip-based process. the resulting transistor shows the best trade-off between on-resistance and gate charge. when used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. this is extremely important for motherboards where fast switching and high efficiency are of paramount importance. applications n specifically designed and optimised for high efficiency cpu core dc/dc converters type v dss r ds(on) i d STB36NF02L 20 v <0.021 w 36 a d 2 pak to-263 (suffixt4) 1 3 add suffix t4" for ordering in tape & reel absolute maximum ratings symbol parameter value unit v ds drain-source voltage (v gs = 0) 20 v v dgr drain-gate voltage (r gs = 20 k w ) 20 v v gs gate- source voltage 20 v i d drain current (continuos) at t c = 25c 36 a i d drain current (continuos) at t c = 100c 25 a i dm ( ) drain current (pulsed) 144 a p tot total dissipation at t c = 25c 75 w derating factor 0.5 w/c t stg storage temperature C65 to 175 c t j max. operating junction temperature 175 c internal schematic diagram ( )pulse width limited by safe operating area
STB36NF02L 2/6 thermal data electrical characteristics (t case = 25 c unless otherwise specified) off on (* ) dynamic r thj-case thermal resistance junction-case max max 2 c/w r thj-amb thermal resistance junction-ambient max max 62.5 c/w t j maximum lead temperature for soldering purpose 300 c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a v gs = 0 20 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c = 125 c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 1 2.5 v r ds(on) static drain-source on resistance v gs = 10 v i d = 18 a v gs = 4.5 v i d = 18 a 0.016 0.023 0.021 0.03 w w i d(on) on state drain current v ds > i d(on) x r ds(on)max v gs =10v 36 a symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds > i d(on) x r ds(on)max i d =18 a 20 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitances v ds = 25v f = 1 mhz v gs = 0 750 270 60 pf pf pf
3/6 STB36NF02L switching on switching off source drain diode (*) pulsed: pulse duration = 300 s, duty cycle 1.5 %. ( ) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 15 v i d = 40 a r g = 4.7 w v gs = 4.5 v (see test circuit, figure 3) 20 270 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 16 v i d = 36 a v gs =10v 19 3 5 21 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 15 v i d = 40 a r g = 4.7 w v gs = 4.5 v (resistive load, see fig.3) 35 60 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ) source-drain current source-drain current (pulsed) 36 144 a a v sd (*) forward on voltage i sd = 36 a v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd =36 a di/dt = 100 a/s v dd = 15 v t j = 150 c (see test circuit, figure 5) 50 80 2 ns nc a electrical characteristics (continued) ..
STB36NF02L 4/6 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
5/6 STB36NF02L d 2 pak mechanical data dim. mm. inch min. typ max. min. typ. max. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 a2 0.03 0.23 0.001 0.009 b 0.7 0.93 0.027 0.036 b2 1.14 1.7 0.044 0.067 c 0.45 0.6 0.017 0.023 c2 1.23 1.36 0.048 0.053 d 8.95 9.35 0.352 0.368 d1 8 0.315 e 10 10.4 0.393 e1 8.5 0.334 g 4.88 5.28 0.192 0.208 l 15 15.85 0.590 0.625 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.068 m 2.4 3.2 0.094 0.126 r 0.4 0.015 v2 0 o8o
STB36NF02L 6/6 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics ? 2000 stmicroelectronics - all rights reserved all other names are the property of their respective owners. stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
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